Instruction Sets
x86, ARM, RISC-V and how CPUs speak different languages
Introduction
Every CPU understands a specific language — a set of commands that it can execute. This language is called the Instruction Set Architecture (ISA), and it defines the fundamental operations a processor can perform: arithmetic, data movement, control flow, and input/output. Just as humans speak different languages, CPUs from different families speak different ISAs.
The ISA acts as the boundary between hardware and software. Programmers do not need to know the intricate details of a CPU's microarchitecture — they just need to know what instructions are available. A program compiled for the x86 ISA will run on any x86 processor, whether it is an Intel Core i9 or an AMD Ryzen 9, because both implement the same ISA. However, that same program will not run on an ARM-based Apple M2 chip without emulation or recompilation.
The choice of ISA has enormous implications for compatibility, performance, power efficiency, and ecosystem. In this chapter, we explore the three major ISAs that dominate modern computing: x86 (the incumbent in desktops and servers), ARM (the leader in mobile and increasingly in laptops), and RISC-V (the open-source newcomer poised to disrupt the industry).
How It Works
An ISA is like a restaurant menu. The menu lists all the dishes (instructions) the kitchen can prepare. You can order any combination of these dishes, and the kitchen will prepare them using its own internal recipes (microarchitecture). Two restaurants might have the same menu but prepare the dishes very differently behind the scenes. As long as the menu items are the same, you can go to either restaurant and get the same result.
Household Object Analogy
Think of instruction sets like international power plug types. Type A plugs (two flat pins) work in North America, while Type G (three rectangular pins) work in the UK. If you have a device with a Type A plug, you need an adapter to use it in a Type G socket — just like software compiled for x86 needs emulation to run on ARM. The ISA is the shape of the plug, and the operating system is the adapter.
Deeper Dive
Instruction set architectures fall into two broad categories: CISC (Complex Instruction Set Computer) and RISC (Reduced Instruction Set Computer). CISC architectures like x86 provide many complex instructions that can do multiple things at once — for example, a single instruction might load data from memory, perform arithmetic, and store the result back. This makes individual instructions powerful but complex to decode and execute.
RISC architectures like ARM and RISC-V take the opposite approach: they provide a small set of simple, uniform instructions that each do one thing. A RISC program needs more instructions to accomplish the same task as a CISC program, but each instruction executes very quickly — often in a single clock cycle. This simplicity makes RISC CPUs easier to design, more power-efficient, and easier to pipeline. The RISC philosophy has largely won the architectural debate, and even modern x86 CPUs internally decode their complex instructions into simpler RISC-like micro-operations.
x86: The Desktop and Server Standard
The x86 ISA originated with Intel's 8086 processor in 1978 and has evolved through decades of backward-compatible extensions. Today, x86 (in its 64-bit form, x86-64 or AMD64) powers the vast majority of desktop PCs, laptops, and cloud servers. Its dominance is driven by an enormous software ecosystem: Windows, Linux, and thousands of applications have been compiled for x86 over four decades.
One of the most important extensions to x86 is SIMD (Single Instruction, Multiple Data) — instruction sets like SSE and AVX that allow the CPU to perform the same operation on multiple data elements in a single instruction. SIMD is crucial for multimedia processing, scientific computing, and machine learning. Modern x86 CPUs also include specialised instructions for cryptography (AES-NI), virtualisation (VT-x/AMD-V), and random number generation.
ARM: The Mobile and Efficiency Leader
ARM (originally Acorn RISC Machine, now Advanced RISC Machines) is a RISC ISA that dominates the mobile and embedded world. Over 200 billion ARM-based chips have been shipped, powering nearly every smartphone, tablet, and IoT device. ARM's key advantage is power efficiency — its clean RISC design consumes far less energy than x86 for equivalent tasks, which is critical for battery-powered devices.
ARM Holdings does not manufacture chips; it licenses the ISA design to companies like Apple, Qualcomm, Samsung, and NVIDIA. This licensing model has created a vast ecosystem of custom chip designs — from Apple's M-series processors (which combine high-performance and efficiency cores) to Qualcomm's Snapdragon chips for Android phones. The latest ARMv9 architecture adds features like Scalable Vector Extensions (SVE) for HPC and AI workloads.
RISC-V: The Open-Source Revolution
RISC-V (pronounced "risk-five") is a free and open ISA that anyone can use without paying licensing fees. Developed at UC Berkeley starting in 2010, RISC-V is designed to be modular and extensible — a small base set of mandatory instructions (RV32I or RV64I) can be augmented with standard extensions for integer multiplication and division (M), atomic operations (A), single-precision floating point (F), and more.
RISC-V's open nature has sparked enormous interest across the industry. It allows companies to design custom processors without paying ARM's licensing fees or being locked into Intel's proprietary ecosystem. Startups, research institutions, and even governments are investing in RISC-V as a strategic hedge against dependence on proprietary ISAs. While RISC-V has not yet reached parity with x86 and ARM in performance or software ecosystem, it is growing rapidly and is expected to be a major force in the coming decade.
Compatibility and Microcode
Microcode is a hidden layer of low-level instructions that sits between the ISA and the CPU's hardware. It allows CPU designers to implement complex instructions as sequences of simpler micro-operations. More importantly, microcode can be updated via firmware patches, allowing CPU bugs to be fixed — or, controversially, performance to be reduced — after the chip has shipped. This is how Intel and AMD patched the Spectre and Meltdown vulnerabilities in 2018.
Compatibility between different CPUs that implement the same ISA is never perfect. There are subtle differences in how each microarchitecture handles edge cases — undefined behaviour in the ISA specification, timing differences, and errata (documented bugs). Software that relies on undocumented behaviour may work on one CPU but not another. This is why compatibility testing is a critical part of software development, especially for low-level systems code like operating systems and hypervisors.
Key Insight
The ISA is the contract between software and hardware. It is arguably the most important decision in computing because it determines which software can run on which hardware. The battle between x86, ARM, and RISC-V is not just a technical one — it is a battle between business models, ecosystems, and visions of the future of computing.
Advanced
At a deeper level, instruction sets involves rules and patterns that engineers use worldwide. ISA follows standards so different brands and devices can still work together. That is why your phone, school laptop, and game console can all connect to the same network or use the same apps.
x86 does not happen in a straight line. Systems often use backup paths, error checking, and retries so information arrives correctly. When something fails, smart ARM design helps the system recover instead of shutting down completely.
Scientists and engineers keep improving these systems every year — making them faster, safer, and more energy-efficient. The ideas you learn in this chapter are the same building blocks used in real data centers, robots, apps, and websites around the world.
Vocabulary Table
| Term | Definition |
|---|---|
| ISA | Instruction Set Architecture — the set of commands that a CPU can execute, forming the interface between software and hardware |
| x86 | A CISC ISA originating with Intel's 8086, dominant in desktop PCs and servers since the 1980s |
| ARM | A RISC ISA licensed to many manufacturers, dominant in mobile devices and increasingly in laptops |
| RISC-V | A free, open RISC ISA designed at UC Berkeley, gaining rapid adoption across many sectors |
| Instruction | A single command in the ISA that tells the CPU to perform a specific operation |
| SIMD | Single Instruction, Multiple Data — an extension that performs the same operation on multiple data elements simultaneously |
| Microcode | A low-level instruction layer that translates complex ISA instructions into simple hardware control signals |
| Compatibility | The ability of software compiled for one ISA to run on different processors that implement the same ISA |
| CISC | Complex Instruction Set Computer — an ISA philosophy with many powerful, multi-step instructions (e.g., x86) |
| RISC | Reduced Instruction Set Computer — an ISA philosophy with simple, uniform, single-cycle instructions (e.g., ARM) |
Fun Facts
The x86 ISA has accumulated over 1,000 different instructions in its 40+ year history. The original 8086 had just 117 instructions. Many of the newer instructions are for specialised tasks like vector processing, cryptography, and virtualisation that simply did not exist in 1978.
Apple's transition from x86 to ARM (announced in 2020) was completed in just two years — a remarkable feat. The Rosetta 2 dynamic binary translator allowed existing x86 software to run on ARM at surprisingly good performance, smoothing the transition for users and developers.
RISC-V is so simple that a basic implementation can be built by university students as a class project. The core specification is only about 250 pages, compared to thousands of pages for x86 and ARM. This simplicity makes it ideal for educational purposes and custom embedded designs.
The name "ARM" originally stood for "Acorn RISC Machine" because the first ARM processor was developed by Acorn Computers in the UK in 1985. The company was so small that the ARM1 prototype was famously fabricated on a Sunday to save costs on the university's chip fabrication line.
The x86 instruction encoding is famously irregular — instructions vary from 1 to 15 bytes long, and decoding them is one of the most complex parts of an x86 CPU. In contrast, all ARM (AArch64) instructions are exactly 4 bytes (32 bits), making decoding and pipelining much simpler.
Interactive Diagram
Launch the interactive diagram to explore Instruction Sets.
Open Interactive DiagramThe interactive diagram for this chapter demonstrates Instruction Sets. It shows a comparison of different instruction set architectures (RISC vs CISC) and how instructions are formatted.
What to explore:
- toggle between RISC and CISC; watch the same program compile into different instruction patterns; compare complexity
- an instruction set defines the basic operations a CPU can perform — RISC uses simple, fast instructions while CISC uses complex, powerful ones
Knowledge Check
1. What is the main difference between CISC and RISC ISAs?
Answer: CISC has complex, multi-step instructions; RISC has simple, single-cycle instructions
2. Why is software compiled for x86 not directly compatible with ARM processors?
Answer: x86 and ARM use different instruction set architectures — the software speaks a language the hardware does not understand
3. What makes RISC-V unique compared to x86 and ARM?
Answer: It is a free, open ISA that anyone can use without licensing fees