Consica Labs

Consica Labs
Chapter 5

Registers

The CPU's fastest memory

Introduction

Inside every CPU, right next to the ALU and Control Unit, sit tiny storage locations called registers. Registers are the fastest form of memory in a computer system — even faster than the L1 cache. They are built directly into the CPU's execution core and can be read or written in a single clock cycle.

Every instruction the CPU executes involves registers in some way. Registers hold the operands for arithmetic operations, store the results of calculations, keep track of the next instruction to execute, and hold the CPU's current status. Without registers, the CPU would have to access main memory (RAM) for every single operation, which would be hundreds of times slower.

How It Works

A register is a group of flip-flops, each storing one bit of data. If a CPU has 64-bit registers (as all modern x86 and ARM CPUs do), each register consists of 64 flip-flops arranged in parallel. The register file is a collection of all general-purpose registers in the CPU, organized as a small, ultra-fast array that can be accessed in parallel by different execution units.

Different registers serve different purposes. The Accumulator (often called RAX in x86) is the primary register used for arithmetic and logic operations. The Program Counter (PC, also called RIP in x86) holds the memory address of the next instruction to execute. The Memory Address Register (MAR) holds the address being accessed in memory, while the Memory Data Register (MDR) holds the actual data being read from or written to memory.

The Stack Register (SP, Stack Pointer) points to the top of the call stack in memory, which stores function return addresses and local variables. The Flag Register (also called the Status Register or FLAGS) stores the condition flags set by ALU operations — zero, carry, overflow, sign, and parity flags that control conditional branching.

Household Object Analogy

Imagine you are cooking at a kitchen counter. The recipes and ingredients are stored in the pantry (main memory — RAM). But you don't run to the pantry every time you need something — you keep the most frequently used ingredients and tools right on the counter (registers). The salt, pepper, and olive oil are your general-purpose registers. The measuring cup you just filled is the accumulator. The recipe page you're reading is the instruction register. Your sticky note with the next step marked is the program counter. Having everything at arm's reach (registers) makes cooking much faster than walking to the pantry (RAM) every few seconds.

Deeper Dive

The number and types of registers vary by architecture. x86-64 processors have 16 general-purpose registers (RAX, RBX, RCX, RDX, RSI, RDI, RBP, RSP, and R8 through R15), each 64 bits wide. ARM64 (AArch64) processors have 31 general-purpose registers (X0 through X30). These registers can also be accessed in narrower forms — for example, the lower 32 bits of RAX are called EAX, the lower 16 bits are AX, and the lower 8 bits are AL.

Most instructions use registers as operands. For example, an ADD instruction in x86 might look like ADD RAX, RBX, which adds the value in RBX to the value in RAX and stores the result back in RAX. This is called a register-to-register operation and is the fastest type of instruction. Instructions that access memory (like LOAD and STORE) are slower because memory is further from the CPU core.

The register file is a critical component of CPU performance. Modern CPUs implement register files with multiple read and write ports, allowing several instructions to read from and write to registers simultaneously. A typical high-performance CPU might have a register file with 8 read ports and 4 write ports, enabling the dispatch of multiple instructions per cycle without register access conflicts.

Advanced

One of the key innovations in modern CPU design is register renaming. Out-of-order execution can create false dependencies when different instructions use the same architectural register but don't actually depend on each other. Register renaming maps architectural registers to a larger pool of physical registers, eliminating these false dependencies and allowing more instructions to execute in parallel.

Architectural registers are the registers defined by the ISA — the ones programmers and compilers see. Physical registers are the actual hardware registers inside the CPU. A modern CPU might have 16 architectural registers but 200+ physical registers. The register alias table (RAT) maps architectural register names to physical register numbers, and the reorder buffer tracks which physical register holds the latest committed value for each architectural register.

On some architectures, certain registers have special roles. For example, in x86, the RCX register is used as the loop counter for the LOOP instruction, RSI and RDI are source and destination index registers for string operations, and RBP is the base pointer for stack frames. In ARM64, X30 is the link register that holds the return address for function calls, and X29 is the frame pointer. Understanding these special register roles is essential for low-level programming and optimization.

Vocabulary Table

Term Definition
RegisterAn ultra-fast storage location inside the CPU, typically 32 or 64 bits wide
AccumulatorA primary register used to hold operands and results of arithmetic/logic operations
Program Counter (PC)The register that holds the address of the next instruction to be executed
MARMemory Address Register — holds the address of the memory location being accessed
MDRMemory Data Register — holds the data being transferred to or from memory
Stack Pointer (SP)A register that points to the top of the call stack in memory
Flag RegisterA register that stores status flags (zero, carry, overflow) set by ALU operations
Register FileThe array of all general-purpose registers in the CPU, with multiple read/write ports
Register RenamingA technique that maps architectural registers to a larger pool of physical registers
Instruction Register (IR)A register that holds the currently executing instruction for decoding

Fun Facts

The Intel 4004 (1971) had only 16 registers, each just 4 bits wide — a total of 64 bits of register storage, less than a single modern x86 register.

A modern CPU's physical register file can contain 300-500 registers, far more than the 16-31 architectural registers the programmer sees.

Registers are built from SRAM (static RAM) cells — the same technology used for CPU cache, but located even closer to the execution units.

The x86 architecture's 8 original registers (AX, BX, CX, DX, SI, DI, BP, SP) date back to the Intel 8086 from 1978 and are still accessible in modern CPUs.

Reading from a register typically takes about 0.3 nanoseconds, while reading from L1 cache takes about 1 nanosecond and from main memory 100+ nanoseconds.

The RISC-V architecture uses 32 general-purpose registers (x0-x31), with x0 hardwired to always read as zero — a clever design trick that simplifies many common operations.

Interactive Diagram

See how data flows through the CPU's register file during instruction execution.

Open Interactive Diagram

The interactive diagram for this chapter demonstrates Registers. It shows the registers inside a CPU showing data being loaded, stored, and transferred.

What to explore:

  • click to load data into a register; watch it transfer between registers; see how the accumulator works
  • registers are the fastest memory in a computer, located inside the CPU, used for temporary storage of actively processed data

Knowledge Check

1. Which register holds the address of the next instruction to execute?

Answer: Program Counter

2. What is register renaming used for?

Answer: To eliminate false data dependencies in out-of-order execution

3. How many general-purpose registers does x86-64 have?

Answer: 16